Field Guide · concept

Also known as: fixed point, floating point, integer vs float DSP

Fixed-point vs floating-point DSP is the decision of how to represent sample values numerically inside a signal-processing chain: as scaled integers with an implied binary point (fixed-point), or as sign-mantissa-exponent numbers that track their own scale (floating-point).12 The choice sets the achievable dynamic range, the risk of overflow, and the silicon, power, and effort cost — which is why it splits along hardware lines, with tiny embedded targets favouring fixed-point and PC-class SDR favouring float.

fixed-point: evenly spaced levels, fixed window integer + scale floating-point: proportional spacing, wide range mantissa × 2^exp float keeps relative precision across many decades; fixed-point keeps absolute step size within one window.
Fixed-point places quantization levels at a uniform absolute spacing over a bounded window; floating-point spaces them proportionally to magnitude, covering a vastly larger range with roughly constant relative precision.

How it works

A fixed-point value is an integer paired with an agreed scale — a “Q15” number, for example, treats a 16-bit signed integer as a fraction between −1 and just under +1 with 15 bits after the binary point. Arithmetic is plain integer arithmetic, which is why it runs on the cheapest hardware. The catch is that the programmer manages scale by hand: multiplying two Q15 numbers yields a Q30 result that must be shifted back, sums can overflow the window and must be saturated or pre-scaled, and every filter needs headroom analysis so intermediate values never wrap. Get it wrong and the signal clips or the low bits vanish into quantization noise.

A floating-point value carries its own exponent, so it automatically rescales: a float32 (IEEE 754 single precision) spans roughly ±10^38 with about 24 bits (~7 digits) of relative precision anywhere in that range. The programmer stops worrying about overflow and headroom in normal use and just writes the maths. The cost is that floating-point units are larger, hotter, and historically slower than integer units, and float samples take more memory bandwidth than tightly packed integers.

The essential trade:

  • Dynamic range. Float wins enormously — it holds tiny and huge values in the same buffer without manual rescaling. Fixed-point offers a fixed window (~6 dB per bit) that the designer must position correctly.
  • Cost / power / speed. Fixed-point wins on small or massively parallel hardware where integer units are cheap and float units expensive or absent.
  • Developer effort. Float is far easier and less bug-prone; fixed-point demands explicit scaling, saturation, and overflow reasoning throughout the chain.

In practice

The split follows the hardware. Low-power microcontrollers and DSP chips, and FPGAs where every multiplier is silicon you pay for, are overwhelmingly fixed-point — an embedded SDR decimator or filter is typically built in Q-format integers with carefully budgeted headroom. PC- and phone-class processors have fast floating-point units, so desktop SDR software is almost always written in float32, which removes a whole category of scaling bugs. A common pattern is hybrid: fixed-point in the FPGA close to the ADC where rates are highest, converting to float once samples reach the host CPU. The numerical precision question — how much error accumulates through a long chain — sits directly on top of this choice, since fixed-point rounding at every stage compounds differently from float rounding.

Relevance to SDR

Real SDR hardware straddles the boundary: the RTL-SDR, Airspy, and HackRF deliver 8- to 14-bit integer samples straight off the ADC, and any FPGA or on-chip decimation runs fixed-point, but virtually every host-side SDR framework converts to float32 the moment samples arrive because CPUs handle float effortlessly and the code stays clean. GopherTrunk follows exactly that convention: it ingests integer sample formats from the device or capture file, converts to floating-point early, and does its down-conversion, filtering, and demodulation in float — so it never has to reason about Q-format headroom or saturation in its decode chain. Understanding the trade still matters when writing SDR software, because it tells you why an FPGA design and a Go or C++ host program make opposite representation choices, and where the cost lives when you push DSP down toward the sensor.

Sources

  1. Fixed-point arithmetic — Wikipedia, on integer-scaled representation, Q formats, and overflow/scaling management. ↩

  2. Floating-point arithmetic — Wikipedia, on IEEE 754 representation, dynamic range, and relative precision. ↩

See also