Also known as: FLEX coding, FLEX framing, Motorola FLEX
FLEX protocol coding is the framing and forward-error-correction of Motorola’s
FLEX paging — the high-throughput successor to
POCSAG that multiplexes many pagers onto one channel with time-framed,
interleaved, BCH-protected data.1 A receiver locks the 32-bit
sync marker 0xA6C6AAAA, reads a mode code, reads a frame-info word, then de-interleaves an
88-codeword phase and BCH-decodes each word before any address or message can be read.2
How it works
GopherTrunk’s Decoder is a four-state machine driven one wire bit at a time. In
hunt-marker it slides a 32-bit window for 0xA6C6AAAA; like the paging protocols
generally, it accepts the marker’s bit-inverse too and remembers whether it locked on the
complemented sense. It then reads a 16-bit mode code (the speed/level word — 0x870C
marks the 1600 bps two-level mode GopherTrunk decodes; other modes are recognised and cleanly
skipped), and a 32-bit frame-info word from which it extracts the cycle number
(fiw>>4)&0x0F and frame number (fiw>>8)&0x7F. Finally it collects the phase: 88 codewords
of 32 bits each, PhaseBits = 2816 in total.
The phase is block-interleaved, so bits belonging to one codeword are scattered across the
2816-bit span to spread a fading burst into isolated single errors. The de-interleave maps the
running bit counter c to codeword index ((c>>5)&0xFFF8)|(c&7) and bit position
(c>>3)&31 within that word — reversing the standard’s permutation to reassemble each 32-bit
codeword before it is decoded.
Frame and phase structure
Once the phase is BCH-decoded, its 88 information words are walked as a small self-describing structure:
| Word | Role | Fields GopherTrunk reads |
|---|---|---|
| word 0 | Block Information Word (BIW) | voffset = (biw>>10)&0x3F, aoffset = ((biw>>8)&0x03)+1 |
words [aoffset, voffset) |
address words | short capcode = word − 0x8000 |
word voffset + (i−aoffset) |
Vector Information Word (VIW) | type (viw>>4)&0x07, first message word (viw>>7)&0x7F, length (viw>>14)&0x7F |
| message-word span | message body | 7-bit alphanumeric or 4-bit numeric symbols |
Each address’s vector word names where its message words live, so the decoder can jump straight to a page’s text. Idle address slots (all-zero or all-ones 21-bit words) are skipped.
The bit-reversed BCH
FLEX uses the same BCH(31,21) code as POCSAG — generator 0x769, correcting up to two bit
errors, plus an overall even-parity bit — but lays the codeword out the other way round. FLEX
puts the 21 information bits in the low positions (0..20) with the 10 parity bits above
them (21..30) and the even-parity bit at bit 31; POCSAG puts information in the high bits.
Because a bit-reversal of a codeword preserves Hamming distance, GopherTrunk reuses its tested
POCSAG primitive by reversing 31 bits into and out of it (FLEXBCHDecode32) rather than
maintaining a second BCH decoder. The package notes that the exact on-wire bit order is
reproduced from the de-facto reference decoders (multimon-ng, ARIB STD-T44) and should be
confirmed against a real capture — a best-effort calibration caveat the code carries
explicitly.
Sources
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FLEX (protocol) — Wikipedia, on Motorola’s FLEX paging protocol, its FSK modes and frame structure. ↩
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BCH code — Wikipedia, on the error-correcting code shared by FLEX and POCSAG. ↩