Also known as: ISA
An instruction set architecture (ISA) is the contract between hardware and software: the set of instructions, registers, and data types a processor understands, separate from how any particular chip implements it.1
Overview
The ISA defines what a program can ask the CPU to do — the opcodes, the registers, how memory is addressed, what data types exist — so that machine code written for an ISA runs on any chip that implements it. It is a stable interface: a binary compiled for x86-64 in 2010 still runs on an x86-64 chip made today, because both honour the same contract.
The microarchitecture is the separate question of how a given chip carries those instructions out — its pipeline depth, caches, branch predictors, and execution units. Two chips can share an ISA yet differ wildly in speed and power because their microarchitectures differ. This split is what lets Intel and AMD both build x86 chips, or dozens of vendors all build ARM chips, that run the same software.
RISC versus CISC
ISAs split loosely into two philosophies, though modern designs blur the line internally:
| Trait | RISC | CISC |
|---|---|---|
| Instruction count | Few, simple | Many, complex |
| Instruction length | Fixed | Variable |
| Work per instruction | Small, uniform | Can be large |
| Memory access | Load/store only | Many ops touch memory |
| Examples | ARM, RISC-V | x86 |
The major families today are the CISC x86 and the RISC ARM and open RISC-V. In practice even x86 chips decode their complex instructions into simple RISC-like internal operations, so the distinction is now more about the external contract than the silicon.
Where it fits
The ISA is why a compiler must target a specific architecture, and why a binary built for x86 will not run on an ARM chip without recompilation or emulation. It builds on the von Neumann idea of a stored program the processor fetches and executes. For GopherTrunk this is a daily reality: Go cross-compiles the same source to x86 servers and to the ARM CPU in a Raspberry Pi capture node, each producing native machine code for that ISA.
Sources
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Instruction set architecture — Wikipedia, on the ISA as the hardware/software interface and its separation from microarchitecture. ↩