Hardware acceleration is the practice of offloading a task from the general-purpose CPU onto specialized hardware built to do it faster, more efficiently, or both.¹

Overview

A CPU is a generalist: it can run any code, but it pays for that flexibility in speed and power. When a task is performed constantly and has a regular structure — graphics, video encoding, neural-network math, signal processing — it is often worth building hardware that does only that. Accelerators span a spectrum: the programmable GPU and vector units, the reconfigurable FPGA, and the fixed-function ASIC, with flexibility falling and efficiency rising along the way.

Where it fits

The engineering question is always what to offload: moving work to an accelerator adds complexity and data-transfer overhead, so it pays only when the speedup is large or the CPU genuinely cannot keep up. This is a live trade-off in software-defined radio. GopherTrunk does its DSP and protocol decoding in software on the CPU, deliberately keeping the radio a simple front end; an FPGA doing the channelization in hardware would accelerate wideband, many-channel capture, at the cost of flexibility and a much harder development path.

Sources

1. Hardware acceleration — Wikipedia, on offloading tasks from the CPU to specialized hardware. ↩

See also

• Graphics processing unit (GPU)
• Field-programmable gate array (FPGA)
• Application-specific integrated circuit (ASIC)
• Vector processor
• AI accelerator
• SoC vs discrete